Individual IC chips (a semiconductor die without packaging is referred to herein as a “chip”) are typically packaged by bonding the IC chip to a lead frame and then encapsulating the IC chip and lead frame in an IC package molding compound such as epoxy or polyimide. These IC package molding compounds typically have a modulus in the range of about 30,000 to 50,000 Mega Pascals (MPa).
The IC package molding compound is injected into a mold containing the lead frame and IC chip. After the molding compound cools the packaged IC (PIC) is removed from the mold. During curing and cooling the package molding compound of the PIC shrinks and in shrinking applies compressive stress to the transistors in the PIC. The compressive stress enhances the performance of the p-type metal-oxide-semiconductor (PMOS) transistors and degrades the performance of n-type metal-oxide-semiconductor (NMOS) transistors within the IC chip. These changes in transistor performance vary from the target specifications and can degrade the performance of the IC chip and in some cases, can cause the IC circuit to fail. IC chips with analog transistors are especially sensitive to packaging induced stress.